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ADP5022
 
 
Rev. C | Page 16 of 28
THEORY OF OPERATION
ENABLE
CONTROL
LDO
CONTROL
LDO
UNDERVOLTAGE
LOCK OUT
SOFT START
PWM/
PSM
CONTROL
BUCK2
DRIVER
AND
ANTISHOOT
THROUGH
SOFT START
PWM/
PSM
CONTROL
BUCK1
DRIVER
AND
ANTISHOOT
THROUGH
OSCILLATOR
THERMAL
SHUTDOWN
SYSTEM
UNDERVOLTAGE
LOCK OUT
PWM
COMP
GM ERROR
AMP
GM ERROR
AMP
PSM
COMP
PSM
COMP
LOW
CURRENT
I
LIMIT
PWM
COMP
LOW
CURRENT
I
LIMIT
R1
R2
ADP5022
OUT1
OUT2
VIN1
SW1
PGND1
EN1
EN2
EN3
VDDA   VIN3
AGND    VOUT3
MODE
PGND2
SW2
VIN2
 
Figure 48. Functional Block Diagram
POWER MANAGEMENT UNIT
The ADP5022 is a micro power management units (micro
PMU) combining two step-down (buck) dc-to-dc converters
and a single low dropout linear regulator (LDO). The high
switching frequency and tiny 16-ball WLCSP package allow for
a small power management solution.
To combine these high performance converters and regulators
into the micro PMU, there is a system controller allowing them
to operate together.
Each regulator has a dedicated enable pin. EN1 controls the
activation for Buck1, EN2 controls the activation for Buck2,
and EN3 controls the activation of the LDO. Logic high applied to
the ENx pin turns on the regulator, and a logic low applied to
the ENx pin turns off the regulator. When a regulator is turned
on, the output voltage is controlled through a soft start circuit to
avoid a large inrush current due to the discharged output
capacitors.
The buck regulators can operate in forced PWM mode if the
MODE pin is at a logic high level. In forced PWM mode, the
switching frequency of the two bucks is always constant and
does not change with the load current. If the MODE pin is at a
logic low level, the switching regulators operate in an auto
PWM/ PSM mode. In this mode, the regulators operate at fixed
PWM frequency when the load current is above the power
saving current threshold. When the load current falls below the
power saving current threshold, the regulator in question enters
power saving mode where the switching occurs in bursts. The
burst repetition is a function of the current load and the output
capacitor value. This operating mode reduces the switching
and quiescent current losses. The auto PWM/PSM mode
transition is controlled independently for each buck regulator.
The two bucks operate synchronized to each other.
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